`include "opcodes.v"
`timescale 1ns / 100ps

module datapath( data, zflag, func, clock, not_reset );

inout [15:0] data;
output zflag;
input [3:0] func;
input clock, not_reset;

reg [15:0] Accumulator;

wire [15:0] ALU_output;

   alu ALU ( zflag, ALU_output, Accumulator, data, func);

   always @(posedge clock)
      Accumulator <= #20 ALU_output;

   assign data = ( func == `STA ) ? Accumulator : 16'bz;

endmodule