puts "Owner: austriamicrosystems AG  HIT-Kit: Digital"
set AMSDIR [get_unix_variable AMS_DIR]
set SYNDIR [get_unix_variable SYNOPSYS]

set search_path	". $AMSDIR/synopsys/c35_3.3V $SYNDIR/libraries/syn $SYNDIR/dw/sim_ver"
set target_library "c35_CORELIB_WC.db c35_IOLIB_WC.db c35_IOLIBV5_WC.db"

### use following target-library for 3bus cells
# set target_library "c35_CORELIB_3B_WC.db c35_IOLIB_3B_WC.db"

# set synthetic_library dw_foundation.sldb 
set link_library "* $target_library $synthetic_library"

set sdfout_no_edge  true
set verilogout_equation	false
set verilogout_no_tri	true 
set verilogout_single_bit  false
set hdlout_internal_busses true     
set bus_inference_style "%s\[%d\]"  
set bus_naming_style    "%s\[%d\]"
set write_name_nets_same_as_ports true

puts {USE: set_fix_multiple_port_nets -all [all_designs]}